HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 357

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Figure 10.4 shows how the priority order changes when channel 0 and channel 3 transfers are
requested simultaneously and a channel 1 transfer is requested during the channel 0 transfer. The
DMAC operates as follows:
1. Transfer requests are generated simultaneously to channels 0 and 3.
2. Channel 0 has a higher priority, so the channel 0 transfer begins first (channel 3 waits for
3. A channel 1 transfer request occurs during the channel 0 transfer (channels 1 and 3 are both
4. When the channel 0 transfer ends, channel 0 becomes lowest priority.
transfer).
waiting)
(1) When channel 0 transfers (highest priority channel transfer)
(2) When channel 1 transfers (second highest priority channel transfer)
(3) When channel 2 transfers (third highest priority channel transfer)
(4) When channel 3 transfers (lowest highest priority channel transfer)
Initial priority order
Priority order
after transfer
Initial priority order
Priority order
after transfer
Initial priority order
Priority order
after transfer
Post-transfer priority order
Initial priority
order
Priority order
after transfer
Figure 10.3 Round-Robin Mode
CH0 > CH1 > CH2 > CH3
CH0 > CH1 > CH2 > CH3
CH0 > CH1 > CH2 > CH3
CH0 > CH1 > CH2 > CH3
CH0 > CH1 > CH2 > CH3
CH3> CH0 > CH1 > CH2
CH2 > CH3 > CH0 > CH1
CH1 > CH2 > CH3 > CH0
CH1 > CH2 > CH3 > CH0
Channel 0 becomes bottom
priority
Channel 1 becomes bottom
priority.
The priority of channel 0, which
was higher than channel 1, is also
shifted.
Channel 2 becomes bottom
priority.
The priority of channels 0 and 1,
which were higher than channel 2,
are also shifted. If immediately
after there is a request to transfer
channel 0 only, channel 0 becomes
bottom priority and the priority of
channel 3, which washigher than
channel 0, are also shifted.
Priority order does not change
Rev. 1.00, 02/04, page 319 of 804