HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 390

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

12.3
12.3.1
The WDT can be used to cancel software standby mode with an interrupt such as an NMI
interrupt. The procedure is described below. (The WDT does not operate when resets are used for
canceling, so keep the RESETP pin low until the clock stabilizes.)
1. Before transitioning to software standby mode, always clear the TME bit in WTCSR to 0.
2. Set the type of count clock used in the CKS2 to CKS0 bits in WTCSR and the initial values for
3. Move to standby mode by executing a SLEEP instruction to stop the clock.
4. The WDT starts counting by detecting the edge change of the NMI signal.
5. When the WDT count overflows, the CPG starts supplying the clock and the processor
6. Since the WDT continues counting from H'00, set the STBY bit in the STBCR register to 0 in
12.3.2
To change the frequency used by the PLL, use the WDT. When changing the frequency only by
switching the divider, do not use the WDT.
1. Before changing the frequency, always clear the TME bit in WTCSR to 0. When the TME bit
2. Set the type of count clock used in the CKS2 to CKS0 bits of WTCSR and the initial values for
3. When the frequency control register (FRQCR) is written, the processor stops temporarily. The
4. When the WDT count overflows, the CPG resumes supplying the clock and the processor
5. The counter stops at the values H'00.
Rev. 1.00, 02/04, page 352 of 804
When the TME bit is 1, an erroneous reset or interval timer interrupt may be generated when
the count overflows.
the counter in the WTCNT. These values should ensure that the time till count overflow is
longer than the clock oscillation settling time. This setting does not depend on a value of the
WT/IT bit.
resumes operation. The WOVF and IOVF flags in WTCSR are not set when this happens.
the interrupt processing program and this will stop the WDT. When the STBY bit remains 1,
the LSI again enters the standby mode when the WDT has counted up to H'80. This standby
mode can be canceled by power-on resets.
is 1, an erroneous reset or interval timer interrupt may be generated when the count overflows.
the counter in the WTCNT counter. These values should ensure that the time till count
overflow is longer than the clock oscillation settling time. This setting does not depend on a
value of the WT/IT bit.
WDT starts counting.
resumes operation. The WOVF and IOVF flags in WTCSR are not set when this happens.
Operation
Canceling Software Standby
Changing the Frequency