HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 458

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Reception in Master Mode: Figure 15.10 shows an example of settings and operation for master
mode reception.
Rev. 1.00, 02/04, page 420 of 804
No.
5
6
7
8
2
4
1
3
Store SIOFRXD receive data in SIRDR
SIRDAR, SICDAR, and SIFCTR
Clear the RXE bit in SICTR to 0
Set the SCKE bit in SICTR to 1
synchronously with SIOFSYNC
Set SIMDR, SISCR, SITDAR,
Set the FSE and RXE bits
Figure 15.10 Example of Receive Operation in Master Mode
Start SIOFSCK output
in SICTR to 1
RDREQ = 1?
Read SIRDR
Flow Chart
Transfer
ended?
Start
End
Yes
Yes
No
No
Set the start for frame synchronous
signal output and enable
reception
Read receive data
Set to disable reception
Set operation start for baud rate
generator
Set operating mode, serial clock,
slot positions for transmit/receive
data, slot position for control data,
and FIFO request threshold value
SIOF Settings
Output serial clock
Output frame synchronous
signal
Issue receive transfer
request according to the
receive FIFO threshold
value
End reception
Reception
SIOF Operation

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