upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 96

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 2
96
Initial Value
Table 2-56
Table 2-57
Address
Access
(2)
DFEN1 - Digital filter enable register
The 16-bit DFEN1 register enables/disables the digital filter for TMG0 to TMG2
and TMP0 to TMP1 input channels.
This register can be read/written in 16-bit, 8-bit and 1-bit units.
FFFF F712
0000
DFEN1 register contents
Assignment of input signals to bit positions for register DFEN1
Preliminary User’s Manual U17566EE1V2UM00
DFENC23 DFENC22 DFENC21 DFENC20 DFENC19 DFENC18 DFENC17 DFENC16
Bit
position
Bit position Bit name
R/W
R/W
15
11 to 0
10
11
X
7
0
1
2
3
4
5
6
7
8
9
H
. This register is cleared by any reset.
H
Bit name
DFENC16 TIG03
DFENC17 TIG04
DFENC18 TIG11
DFENC19 TIG12
DFENC20 TIG13
DFENC21 TIG14
DFENC22 TIP00/TIG20
DFENC23 TIG21
DFENC24 TIG22
DFENC25 TIG23
DFENC26 TIG24
DFENC27 TIP10/TTIG25
R/W
R/W
14
X
6
DFENC[27:16]
R/W
R/W
Input signal
13
X
5
Enables/disables the digital noise elimination filter for
the corresponding input signal:
For an assignment of bit positions to input signals
see table Table 2-57.
0: Digital filter is disabled.
1: Digital filter is enabled.
R/W
R/W
12
X
4
Description
Timer TMG0 channel 3 capture input
Timer TMG0 channel 4 capture input
Timer TMG1 channel 1 capture input
Timer TMG1 channel 2 capture input
Timer TMG1 channel 3 capture input
Timer TMG1 channel 4 capture input
Timer TMP0 channel 0 capture input /
Timer TMG2 channel 0 capture input
Timer TMG2 channel 1 capture input
Timer TMG2 channel 2 capture input
Timer TMG2 channel 3 capture input
Timer TMG2 channel 4 capture input
shared input:
Timer TMP1 channel 0 capture input/
Timer TMG2 channel 5 capture input
shared input:
DFENC27 DFENC26 DFENC25 DFENC24
R/W
R/W
11
3
Function
R/W
R/W
10
2
R/W
R/W
Pin Functions
9
1
R/W
R/W
8
0