upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 204

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 5
204
Figure 5-5
CPU processing
INTC accepted
Note
Maskable interrupt processing
For the ISPR register, see “ISPR - In-service priority register“ on page 216.
An INT input masked by the Interrupt Controllers and an INT input that occurs
while another interrupt is being processed (when PSW.NP = 1 or PSW.ID = 1)
are held pending internally by the Interrupt Controller. In such case, if the
interrupts are unmasked, or when PSW.NP = 0 and PSW.ID = 0 as set by the
RETI and LDSR instructions, input of the pending INT starts the new maskable
interrupt processing.
Preliminary User’s Manual U17566EE1V2UM00
EIPC
EIPSW
ECR.EICC
PSW.EP
PSW.ID
PC
Maskable interrupt request
than that of other interrupt
priority of interrupt requests
that of interrupt currently
Interrupt processing
with the same priority?
Priority higher than
Priority higher
Highest default
xxMK = 0
INT input
processed?
PSW.NP
xxIF = 1
request?
PSW.ID
restored PC
PSW
exception code
0
1
handler address
Yes
Yes
Yes
Yes
Yes
0
0
1
1
No
No
Is the interrupt
mask released?
No
No
No
Interrupt request pending
Interrupt request pending
Interrupt Controller (INTC)