upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 877

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
Chapter 28 On-Chip Debug Unit
28.1.1 Debug functions
28.1 Functional Outline
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(2)
(3)
(4)
(5)
(6)
(7)
Preliminary User’s Manual U17566EE1V2UM00
The microcontroller includes an on-chip debug unit. By connecting an N-Wire
emulator, on-chip debugging can be executed.
Debug interface
Communication with the host machine is established by using the DRST, DCK,
DMS, DDI, and DDO signals via an N-Wire emulator. The communication
specifications of N-Wire are used for the interface.
On-chip debug
On-chip debugging can be executed by preparing wiring and a connector for
on-chip debugging on the target system. An N-Wire emulator is used to
connect the host PC to the on-chip debug unit.
Forced reset function
The microcontroller can be forcibly reset.
Break reset function
The CPU can be started in the debug mode immediately after reset of the CPU
is released.
Forced break function
Execution of the user program can be forcibly aborted.
Hardware break function
Two breakpoints for instruction and data access can be used. The instruction
breakpoint can abort program execution at any address. The access
breakpoint can abort program execution by data access to any address.
Software break function
Up to eight software breakpoints can be set in the internal flash memory area.
The number of software breakpoints that can be set in the RAM area differs
depending on the debugger to be used.
The software breakpoints utilize the “DBTRAP” ROM correction function. Thus
following software breakpoints can be set:
• 8 breakpoints in the VFB flash/ROM address range
• 8 breakpoints in the VSB flash memory address range (µPD70F3426 only)
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