upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 362
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 11
362
INTTPnCC0 signal
TPnCCR0 register
TOPn0 pin output
16-bit counter
Count clock
INTTPnCC0 signal
TPnCE bit
TPnCCR0 register
TOPn0 pin output
16-bit counter
(3)
TPnCE bit
FFFFH
0000H
Interval timer mode operation timing
(a) Operation if TPnCCR0 register is set to 0000H
(b) Operation if TPnCCR0 register is set to FFFFH
Preliminary User’s Manual U17566EE1V2UM00
If the TPnCCR0 register is set to 0000H, the INTTPnCC0 signal is
generated at each count clock, and the output of the TOPn0 pin is inverted.
The value of the 16-bit counter is always 0000H.
FFFFH
If the TPnCCR0 register is set to FFFFH, the 16-bit counter counts up to
FFFFH. The counter is cleared to 0000H in synchronization with the next
count-up timing. The INTTPnCC0 signal is generated and the output of the
TOPn0 pin is inverted. At this time, an overflow interrupt request signal
(INTTPnOV) is not generated, nor is the overflow flag (TPnOPT0.TPnOVF
bit) set to 1.
count clock cycle
Count clock cycle
Interval time
Interval time
10000H ×
0000H
count clock cycle
Count clock cycle
Interval time
Interval time
10000H ×
FFFFH
0000H
0000H
16-bit Timer/Event Counter P (TMP)
count clock cycle
Count clock cycle
Interval time
Interval time
10000H ×
0000H
0000H
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