upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 680
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 19
680
ABTD3
0
0
0
0
0
0
0
0
1
After reset: 00H
CnGMABTD
ABTD2
Other than above
Caution
0
0
0
0
1
1
1
1
0
(4)
ABTD1
7
0
CnGMABTD - CANn global automatic block transmission delay register
The CnGMABTD register is used to set the interval at which the data of the
message buffer assigned to ABT is to be transmitted in the normal operation
mode with ABT.
1.
2.
Preliminary User’s Manual U17566EE1V2UM00
R/W
0
0
1
1
0
0
1
1
0
Do not change the contents of the CnGMABTD register while the ABTTRG
bit is set to 1.
The timing at which the ABT message is actually transmitted onto the CAN
bus differs depending on the status of transmission from the other station or
how a request to transmit a message other than an ABT message (message
buffers 8 to 31) is made.
ABTD0
Address: <CnRBaseAddr> + 008
6
0
0
1
0
1
0
1
0
1
0
Data frame interval during automatic block transmission
(Unit: Data bit time (DBT))
0 DBT (default value)
2
2
2
2
2
2
2
2
Setting prohibited
5
6
7
8
9
10
11
12
DBT
DBT
DBT
DBT
DBT
5
0
DBT
DBT
DBT
4
0
H
ABTD3
3
ABTD2
2
CAN Controller (CAN)
ABTD1
1
ABTD0
0
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