upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 518

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 16
518
16.4 Interrupt Request Signals
(1)
(2)
(3)
The following three interrupt request signals are generated from UARTAn:
• Reception complete interrupt request signal (INTUAnR)
• Receive error interrupt request signal (INTUAnRE)
• Transmission enable interrupt request signal (INTUAnT)
Reception complete interrupt request signal (INTUAnR)
A reception complete interrupt request signal is output when data is shifted into
the receive shift register and transferred to the UAnRX register in the reception
enabled status.
In case of erroneous reception, the reception error interrupt INTUanRE is
generated instead of INTUAnR.
No reception complete interrupt request signal is generated in the reception
disabled status.
Receive error interrupt request signal (INTUAnRE)
A receive error interrupt request is generated if an error condition occurred
during reception, as reflected by UAnSTR.UAnPE (parity error flag),
UAnSTR.UAnFE (framing error flag), UAnSTR.UAnOVE (overrun error flag).
Note that INTUAnR and INTUAnRE do exclude each other: upon correct
reception of data only INTUAnR is generated. In case of a reception error
INTUAnRE is generated only.
Transmission enable interrupt request signal (INTUAnT)
If transmit data is transferred from the UAnTX register to the UARTAn transmit
shift register with transmission enabled, the transmission enable interrupt
request signal is generated.
Preliminary User’s Manual U17566EE1V2UM00
Asynchronous Serial Interface (UARTA)