upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 562
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
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Chapter 17
562
SIBn
capture
SCKBn
SIBn
capture
Reg-R/W
SCKBn
SOBn
Reg-R/W
INTCBnT
interrupt
INTCBnR
interrupt
CBnTSF
SOBn
INTCBnT
interrupt
INTCBnR
interrupt
CBnTSF
Figure 17-6
Figure 17-7
Note 1
Note 2
Note 1
Note 2
Note
(iii) Communication type 2 (CBnCKP = 0, CBnDAP = 1)
(iv) Communication type 4 (CBnCKP = 1, CBnDAP = 1)
1.
2.
Preliminary User’s Manual U17566EE1V2UM00
The INTCBnT interrupt is set when the data written to the transmit buffer is
transferred to the data shift register in the continuous transmission or
continuous transmission/reception modes. In the single transmission or
single transmission/reception modes, the INTCBnT interrupt request signal
is not generated, but the INTCBnR interrupt request signal is generated
upon completion of communication.
The INTCBnR interrupt occurs if reception is correctly completed and
receive data is ready in the CBnRX register while reception is enabled, and
if an overrun error occurs. In the single mode, the INTCBnR interrupt
request signal is generated even in the transmission mode, upon
completion of communication.
D7
D7
D6
D6
D5
D5
D4
D4
D3
D3
Clocked Serial Interface (CSIB)
D2
D2
D1
D1
D0
D0
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