upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 598

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 18
598
Figure 18-10
18.6.5 Stop condition
When the SCLn pin is high level, changing the SDAn pin from low level to high
level generates a stop condition.
A stop condition is a signal that the master device outputs to the slave device
when serial transfer has been completed. When used as the slave device, the
start condition can be detected.
Stop condition
A stop condition is generated when the IICCn.SPTn bit is set to 1. When the
stop condition is detected, the IICSn.SPDn bit is set to 1 and the INTIICn
signal is generated when the IICCn.SPIEn bit is set to 1. By setting
IICCN.STPn=1 the master device will also cancel its own wait status.
Preliminary User’s Manual U17566EE1V2UM00
SDAn
SCLn
H
I
2
C Bus (IIC)