upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 147
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Clock Generator
Bit position
4 to 2
1 to 0
Initial Value
Table 4-11
Address
Access
SCFMC[4:2] Frequency modulation range control:
SCFMC[1:0] Frequency modulation frequency control:
Bit name
Note
(3)
SCFMC - SSCG frequency modulation control register
The 8-bit SCFMC register controls the frequency modulation of the SSCG in
dithering mode (when CKC.DEN = 1).
This register can be read/written in 8-bit or 1-bit units.
FFFF F82A
00
SCFMC register contents
1.
2.
In dithering mode, the SSCG output frequency f
FM range, specified by SCFMC[4:2], around it’s center value:
The time of one full cycle is given by the period of the modulation frequency
specified in SCFMC[1:0].
Preliminary User’s Manual U17566EE1V2UM00
H
Function
. The register is initialized by any reset.
R
This register can only be rewritten with a new value if the SSCG is
switched off. Refer to the explanation at the beginning of this section.
The given modulation ranges and frequencies are typical values. Refer
also to the Electrical Target Specification.
f
7
0
SSCG
SCFMC4
SCFMC1
0
0
0
0
1
1
0
0
1
1
= f
H
.
R
SSCGc
6
0
other settings
SCFMC3
SCFMC0
± (FM range)
0
0
1
1
0
0
0
1
0
1
R
5
0
Modulation frequency
40 kHz (typical value)
50 kHz (typical value)
60 kHz (typical value)
prohibited
SCFMC4
SCFMC2
R/W
4
0
1
0
1
0
1
SCFMC3
R/W
FM range
± 0.5 % (typical value)
± 1.0 % (typical value)
± 2.0 % (typical value)
± 3.0 % (typical value)
± 4.0 % (typical value)
± 5.0 % (typical value)
prohibited
3
SCFMC2
SSCG
R/W
2
varies according to the
SCFMC1
R/W
1
Chapter 4
SCFMC0
R/W
0
147
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