upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 219
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
- Current page: 219 of 930
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Interrupt Controller (INTC)
Caution
The NMI and INTP0 share the same pin. The register bits NMIEN, ESEL0,
ESEL01 and ESEL00 configure the NMI and INTP0 interrupt function:
The NMI configuration bits INTM0.NMIEN and INTM0.ESEL0[1:0] can only be
changed if INTM0.NMIEN = 0.
Due to INTM0.NMIEN = 0 after reset the NMI function is disabled and must be
enabled by the application software. Once enabled, the NMI function cannot be
disabled by software.
Specify INTM0.ESEL0[1:0] before or at the same time with setting
INTM0.NMIEN = 1.
Note that INTM0.ESEL0 can be written independently of INTM0.NMIEN.
Preliminary User’s Manual U17566EE1V2UM00
NMIEN
0
1
ESEL0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
ESEL01
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
ESEL00
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
falling edge
falling edge
rising edge
both edges
rising edge
both edges
prohibited
prohibited
masked
NMI
Function
falling edge
falling edge
rising edge
both edges
rising edge
both edges
prohibited
prohibited
high level
high level
high level
high level
low level
low level
low level
low level
Chapter 5
INTP0
219
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