upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 552
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 17
552
INTCBnR
17.4.1 Single transfer mode (master mode, transmission/reception
CBnSCE
register
CBnTSF
17.4 Operation
SCKBn
CBnTX
CBnRX
SOBn
Shift
SIBn
Note
CBnTX write (55H)
(1)
(2)
(3)
(4)
mode)
MSB first (CBnCTL0.CBnDIR bit = 0), communication type 1 (see 16.4 (2)
CSIBn control register 1 (CBnCTL1), transfer data length = 8 bits
(CBnCTL2.CBnCL3 to CBnCTL2.CBnCL0 bits = 0, 0, 0, 0)
(1) Clear the CBnCTL0.CBnPWR bit to 0.
(2) Set the CBnCTL1 and CBnCTL2 registers to specify the transfer mode.
(3) Set the CBnTXE, CBnRXE, and CBnSCE bits of the CBnCTL0 register to
(4) Set the CBnPWR bit to 1 to enable the CSIBn operation.
(5) Write transfer data to the CBnTX register (transmission start).
(6) The reception complete interrupt request signal (INTCBnR) is output.
(7) Read the CBnRX register before clearing the CBnPWR bit to 0.
(8) Check that the CBnSTR.CBnTSF bit = 0 and set the CBnPWR bit to 0 to
To continue transfer, repeat steps (5) to (7) before (8).
In transmission mode or transmission/reception mode, communication is not
started by reading the CBnRX register.
Preliminary User’s Manual U17566EE1V2UM00
(5)
1 at the same time as specifying the transfer mode using the CBnDIR bit,
to set the transmission/reception enabled status.
stop operation of CSIBn (end of transmission/reception).
1
0
ABH
55H (transmit data)
0
1
56H
1
0
ADH
0
1
5AH
1
0
B5H
0
1
Clocked Serial Interface (CSIB)
6AH
1
0
D5H
(6)
CBnRX read (AAH)
0
1
(AAH)
(55H)
AAH
AAH
(7)
(8)
00H
00H
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