upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 283

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Bus and Memory Control (BCU, MEMC)
Programmable wait
Wait by WAIT pin
Figure 7-10
Wait control
WAIT pin
Note
BCLK
(2)
(3)
(4)
Programmable wait function
With the purpose of realizing easy interfacing with low-speed memory or with
I/Os, it is possible to insert up to seven data wait states after the first access
cycle (T1 state).
The number of wait states can be specified by data wait control registers
DWC0 and DWC1.
For on-page access of a page ROM, wait control is performed according to
page ROM configuration register (PRC) setting. The settings of registers
DWC0 and DWC1 are neglected.
External wait function
Each read or write operation takes at least two cycles (T1 and T2). To stretch
the access cycle for accessing slow external devices, any number of wait
states (TW) can be inserted under external control of the WAIT signal.
The WAIT signal can be set asynchronously from the system clock. The WAIT
signal is sampled at the rising edge of the clock in the T1 and TW states.
Depending on the level of the WAIT signal at sampling timing, a wait state is
inserted or not.
Relationship between programmable wait and external wait
If both programmable wait and external wait (WAIT) are applied, an OR
relation gives the resulting number of wait cycles. Figure 7-10 shows that as
long as any of the two waits is active, a wait cycle will be performed.
Example of wait insertion
The circles indicate the sampling timing.
Preliminary User’s Manual U17566EE1V2UM00
T1
TW
TW
TW
T2
Chapter 7
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