upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 376
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 11
376
TIPn0 pin
Figure 11-14
selection
Count
clock
Software trigger
11.5.3 External trigger pulse output mode
generation
TPnCE bit
detector
Edge
(TPnMD2 to TPnMD0 = 010)
In the external trigger pulse output mode, 16-bit timer/event counter P waits for
a trigger when the TPnCTL0.TPnCE bit is set to 1. When the valid edge of an
external trigger input signal is detected, 16-bit timer/event counter P starts
counting, and outputs a PWM waveform from the TOPn1 pin.
Pulses can also be output by generating a software trigger instead of using the
external trigger. When using a software trigger, a square wave that has one
cycle of the PWM waveform as half its cycle can also be output from the
TOPn0 pin.
Configuration in external trigger pulse output mode
Preliminary User’s Manual U17566EE1V2UM00
control
Count
start
CCR1 buffer register
CCR0 buffer register
TPnCCR1 register
TPnCCR0 register
16-bit counter
Match signal
Match signal
16-bit Timer/Event Counter P (TMP)
Clear
Transfer
Transfer
S
R
controller
controller
Output
(RS-FF)
Output
INTTPnCC1 signal
INTTPnCC0 signal
TOPn1 pin
TOPn0 pin
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