upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 642
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 19
642
INTCnWUP
INTCnERR
INTCnREC
INTCnTRX
TSOUTCn
16 MHz
PCLK0
Figure 19-1
19.1.2 Configuration
f
CAN
interface
CPU
NPB
The CAN Controller is composed of the following four blocks.
• NPB interface
• MAC (Memory Access Controller)
• CAN protocol layer
• CAN RAM
Block diagram of CAN module
Preliminary User’s Manual U17566EE1V2UM00
This functional block provides an NPB (NEC Peripheral I/O Bus) interface
and means of transmitting and receiving signals between the CAN module
and the host CPU.
This functional block controls access to the CAN protocol layer and to the
CAN RAM within the CAN module.
This functional block is involved in the operation of the CAN protocol and its
related settings.
This is the CAN memory functional block, which is used to store message
IDs, message data, etc.
(Memory Access Controller)
Message
buffer 0
Message
buffer 1
Message
buffer 2
Message
Message
buffer 31
CAN module
buffer 3
CAN RAM
MAC
(NEC peripheral bus)
NPB
CnMASK1
CnMASK2
CnMASK3
CnMASK4
protocol
CAN
layer
CTXDn
CRXDn
transceiver
CAN Controller (CAN)
CAN
CAN_Hn
CAN_Ln
CAN bus
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