upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 271

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

BCT0
BCT1
Bus and Memory Control (BCU, MEMC)
ME3
ME7
15
15
14
14
1
1
Initial Value
CS3
CS7
Table 7-18
Address
Caution
Access
13
13
0
0
7.3.2 Memory controller registers (µPD70F3427 only)
(1)
BT30 ME2
BT70 ME6
12
12
I
The following registers are part of the Memory Controller. They specify the
type of external device that is connected, the number of data wait states, the
number of address wait states, the number of idle states, and they control
features for page ROM.
BCTn - Bus cycle configuration registers
The 16-bit BCT0 register specifies the external devices that are connected to
the microcontroller device. The register enables the operation of the Memory
Controller for each chip select signal.
These registers can be read/written in 16-bit units.
BCT0: FFFF F480
BCT1: FFFF F482
4444
BCTn register contents
1.
2.
3.
Preliminary User’s Manual U17566EE1V2UM00
Bit Position
15, 11, 7, 3
12, 8, 4, 0
The bits marked with 0 must always be 0.
The bits marked with 1 must always be 1.
To initialize an external memory area after a reset, registers BCTn have to
be set. Do not change this register after initialization. Do not access external
devices before initialization is finished.
11
11
H
10
10
1
1
CS2
CS6
9
0
9
0
Bit Name
H
H
BTk0
MEk
BT20 ME1
BT60 ME5
8
8
7
7
Function
Enables/disables Memory Controller operation for
chip select area k.
Specifies the devices that are connected to chip
select area k.
0: Operation disabled
1: Operation enabled
0: SRAM or external I/O connected
1: Page ROM connected
6
1
6
1
CS1
CS5
5
0
5
0
BT10 ME0
BT50 ME4
4
4
3
3
2
1
2
1
CS0
CS4
Chapter 7
1
0
1
0
BT00
BT40
0
0
271