upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 590

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 18
590
IICXn.CLXn
0
1
IICCLn.SMCn
Note
Note
(7)
0
1
0
1
Transfer rate setting
The nominal transfer rate of the I
means:
• the root clock source for the I
The output clock IICLK supplies the IIC interface.
• The IICLK is divided by 1 to 5, configured by OCKSn.OCKSTHn and
• IICLKPS is passed through another configurable divider that finally outputs
The clock chosen as the input clock, that means IICLKPS, must lie in the range
of 1 MHz to 10 MHz.
Following table lists set-ups for some useful I
The calculations in the above table assumes that IICLK is 32 MHz
(IIC.IICSEL1 = 1)
Preliminary User’s Manual U17566EE1V2UM00
1 0011
– main oscillator (4 MHz): ICC.IICSEL1 = 0
– 32 MHz clock from the PLL: ICC.IICSEL1 = 1
OCKSn.OCKSTn[1:0] (refer to “OCKSn - IICn division clock select registers“
on page 589). The output clock of this divider is named IICLKPS.
the clock for the serial transfer IICLKTC. This divider is configured by
IICCLn.CL[1:0] and IICXn.CLX0 according to the following table:
OCKSn
13
Prescaler
IICCLn.CLn1
H
B
=
0
0
1
1
0
0
1
1
x
0
0
1
1
divisor
5
IICCLn.CLn0
IICCLn.
SMCn
1
0
0
1
0
1
0
1
0
1
x
0
1
0
1
2
C clock IICLK can be chosen as
2
C interface is determined by the following
I
2
C module set-up
IICXn.
Input clock
CLXn
f
f
f
f
f
f
f
f
f
1
0
IICLKPS
IICLKPS
IICLKPS
IICLKPS
IICLKPS
IICLKPS
IICLKPS
IICLKPS
IICLKPS
n.a.
n.a.
n.a.
n.a.
2
C transfer clocks.
CLn[1:0]
IICCLn.
11
11
f
f
f
f
f
f
f
f
f
B
B
IICLKPS
IICLKPS
IICLKPS
IICLKPS
IICLKPS
IICLKPS
IICLKPS
IICLKPS
IICLKPS
Transfer
clock
n.a.
n.a.
n.a.
n.a.
/44
/86
/66
/24
/24
/18
/12
/12
/18
divisor
18
66
I
2
fast-speed
fast-speed
fast-speed
fast-speed
fast-speed
fast-speed
C Bus (IIC)
standard
standard
standard
Transfer
Mode
355,56
n.a.
n.a.
n.a.
n.a.
[KHz]
clock
96,97