upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 495

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Watch Timer (WT)
INTWT0UV
INTTM00
Setup example
WCTCLK
OVF00
CR000
TM00
Figure 14-5
14.5.2 INTWT0UV interval measurement by restarting the counter
T
Note
0000
WCTCLK
H
0001
When the timer is in restart mode (see register TMC00) and it detects the valid
edge of INTWT0UV, it
• copies the present counter value of register TM00 to CR000,
• clears TM00 (restarts counting),
• generates the interrupt request INTTM00.
The valid edge (rising edge, falling edge) is specified in register PRM00. If both
edges are specified, CR000 cannot perform a capture operation.
TMC00 = 0000 1000
CRC00 = 0000 0x11
PRM00.ES00[1:0] = 0100 0000
The following figure is not to scale but illustrates the operation.
Timing in restart mode
As shown in the figure, the present value of CR000 is directly related to the
duration of the previous interval.
If TM00 overflows between two occurrences of INTWT0UV, that means
between two capture triggers, the overflow flag TMC00.OVF00 is set.
Therefore, check also TMC00.OVF00 when reading the second capture value
in order to calculate the interval correctly, because an overflow may have
happened during the measurement.
Preliminary User’s Manual U17566EE1V2UM00
H
D0
(D1 + 1) × T
D0
0000
H
WCTCLK
B
B
:
:
D1
D1
(10000
0000
H
B
H
:
+ D2 + 1) × T
Restart mode
CR000 as capture register with
INTWT0UV as capture signal
Rising edge
FFFF
H
0000
WCTCLK
H
D2
(D3 + 1) × T
D2
0000
H
WCTCLK
D3
Chapter 14
D3
0000
H
495