upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 363
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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16-bit Timer/Event Counter P (TMP)
INTTPnCC0 signal
TPnCCR0 register
TOPn0 pin output
Note
16-bit counter
TPnOL0 bit
TPnCE bit
FFFFH
0000H
(c) Notes on rewriting TPnCCR0 register
1.
2.
3.
Preliminary User’s Manual U17566EE1V2UM00
To change the value of the TPnCCR0 register to a smaller value, stop
counting once and then change the set value.
If the value of the TPnCCR0 register is rewritten to a smaller value during
counting, the 16-bit counter may overflow.
Interval time (1): (D
Interval time (NG): (10000H + D
Interval time (2): (D
If the value of the TPnCCR0 register is changed from D
count value is greater than D
transferred to the CCR0 buffer register as soon as the TPnCCR0 register
has been rewritten. Consequently, the value of the 16-bit counter that is
compared is D
Because the count value has already exceeded D
counter counts up to FFFFH, overflows, and then counts up again from
0000H. When the count value matches D
generated and the output of the TOPn0 pin is inverted.
Therefore, the INTTPnCC0 signal may not be generated at the interval
time “(D
originally expected, but may be generated at an interval of
“(10000H + D
L
1
Interval time (1)
+ 1) × Count clock cycle” or “(D
2
2
+ 1) × Count clock period”.
.
D
1
D
1
2
1
+ 1) × Count clock cycle
+ 1) × Count clock cycle
D
2
Interval time (NG)
2
D
1
but less than D
2
+ 1) × Count clock cycle
2
2
, the INTTPnCC0 signal is
+ 1) × Count clock cycle”
D
2
D
2
1
, the count value is
Interval
time (2)
D
2
, however, the 16-bit
2
1
to D
2
while the
Chapter 11
363
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