upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 414

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 11
414
Figure 11-32
TPnCCR0 register
TPnCCR1 register
INTTPnOV signal
TIPn0 pin input
TIPn1 pin input
16-bit counter
TPnOVF bit
TPnCE bit
FFFFH
0000H
(c) Processing of overflow when two capture registers are used
Example of incorrect processing when two capture registers are used
Preliminary User’s Manual U17566EE1V2UM00
Care must be exercised in processing the overflow flag when two capture
registers are used. First, an example of incorrect processing is shown
below.
The following problem may occur when two pulse widths are measured in
the free-running timer mode.
<1> Read the TPnCCR0 register (setting of the default value of the TIPn0
<2> Read the TPnCCR1 register (setting of the default value of the TIPn1
<3> Read the TPnCCR0 register.
<4> Read the TPnCCR1 register.
When two capture registers are used, and if the overflow flag is cleared to
0 by one capture register, the other capture register may not obtain the
correct pulse width.
Use software when using two capture registers. An example of how to use
software is shown below.
pin input).
pin input).
Read the overflow flag. If the overflow flag is 1, clear it to 0.
Because the overflow flag is 1, the pulse width can be calculated by
(10000H + D
Read the overflow flag. Because the flag is cleared in <3>, 0 is read.
Because the overflow flag is 0, the pulse width can be calculated by
(D
11
D
00
- D
<1>
10
D
) (incorrect).
10
<2>
01
- D
00
D
).
00
D
D
01
10
<3>
16-bit Timer/Event Counter P (TMP)
D
11
<4>
D
01
D
11