upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 558

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 17
558
Shift register
INTCBnT
INTCBnR
SO latch
CBnSCE
CBnTSF
CBnTX
SCKBn
CBnRX
SOBn
SIBn
17.4.6 Continuous mode (slave mode, transmission/reception
(1)
(2)
(3)
(4)
(5)
mode)
MSB first (CBnCTL0.CBnDIR bit = 0), communication type 2 (see 16.4 (2)
CSIBn control register 1 (CBnCTL1)), transfer data length = 8 bits
(CBnCTL2.CSnCL3 to CBnCTL2.CBnCL0 bits = 0, 0, 0, 0)
(1) Clear the CBnCTL0.CBnPWR bit to 0.
(2) Set the CBnCTL1 and CBnCTL2 registers to specify the transfer mode.
(3) Set the CBnTXE, CBnRXE and CBnSCE bits of the CBnCTL0 register to 1
(4) Set the CBnPWR bit to 1 to enable supply of the CSIBn operation.
(5) Write the transfer data to the CBnTX register.
(6) The transmission enable interrupt request signal (INTCBnT) is received
(7) The reception complete interrupt request signal (INTCBnR) is output.
Preliminary User’s Manual U17566EE1V2UM00
at the same time as specifying the transfer mode using the CBnDIR bit, to
set the transmission/reception enabled status.
and the transfer data is written to the CBnTX register.
0
1
55H
1
1
(6)
0
0
1
0
0
1
1
1
0
0
(7)
1
0
CCH
1
1
0
0
AAH
1
0
CCH
0
1
Clocked Serial Interface (CSIB)
1
0
0
1
1
1
(7)
0
0
96H
96H
(8)
00H
00H