upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 823

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
Chapter 23 LCD Bus Interface (LCD-I/F)
Features summary
23.1 Overview
Preliminary User’s Manual U17566EE1V2UM00
The LCD Bus Interface connects the internal peripheral bus to an external LCD
controller. It provides an asynchronous 8-bit parallel data bus and two control
lines.
The LCD Bus Interface supports bidirectional communication. You can send
data to and query data from the LCD controller.
The LCD Bus Interface transmits or receives data bytes. Two control lines
specify the read/write timing and the transfer direction.
The LCD Bus Interface suits LCD controllers that feature automatic generation
of display memory addresses. The interface does not generate or interpret
specific signals that may be required by the LCD controller, like address, chip
select, hold, and so on. If necessary, such signals can be provided by general
purpose I/Os.
The LCD Bus Interface provides:
• Support of two different control signals modes:
• DMA for read and write operations
• 8/16/32-bit write and read operations
• Programmable transfer speed (100 KHz … 3.2 MHz) through
• Interrupt generation selectable upon two events
• Flags that indicate the status of the data register and the progress of data
– mod80 with separate read and write strobe
– mod68 with read/write signal and data strobe “E” with selectable level
– selectable clock input
– programmable transfer time
– programmable wait states
– internal data transfer allowed
– external bus access completed
transfer to or from the LCD controller
823

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