upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 320

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 8
320
Bit position
DRST
3 to 0
7
0
EN3 to EN0 Specifies whether DMA transfer through DMA channel n is to be enabled or
Bit name
8.3.6 DRST - DMA restart register
6
0
The ENn bit of this register and the ENn bit of the DCHCn register are linked to
each other. This provides a fast way to check the status of all DMA channels.
This register can be read/written in 8-bit or 1-bit units.
Preliminary User’s Manual U17566EE1V2UM00
Function
disabled. This bit is cleared to 0 when DMA transfer is completed in accordance
with the terminal count output.
It is also cleared to 0 when DMA transfer is forcibly terminated by setting the
INITn bit to 1 or by NMI input.
0: DMA transfer disabled
1: DMA transfer enabled
5
0
4
0
EN3
3
EN2
2
EN1
1
EN0
0
DMA Controller (DMAC)
FFFFF0F2H
Address
Initial
value
00H