upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 418

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 11
418
Figure 11-36
TPnCCRm register
INTTPnOV signal
TIPnm pin input
16-bit counter
Note
TPnOVF bit
counter
TPnCE bit
Overflow
FFFFH
0000H
Example when capture trigger interval is long
The overflow counter is set arbitrarily by software on the internal RAM.
Preliminary User’s Manual U17566EE1V2UM00
Note
If an overflow occurs twice or more when the capture trigger interval is
long, the correct pulse width may not be obtained.
If the capture trigger interval is long, slow the count clock to lengthen one
cycle of the 16-bit counter, or use software. An example of how to use
software is shown next.
<1> Read the TPnCCRm register (setting of the default value of the
<2> An overflow occurs. Increment the overflow counter and clear the
<3> An overflow occurs a second time. Increment (+1) the overflow
<4> Read the TPnCCRm register.
TIPnm pin input).
overflow flag to 0 in the overflow interrupt servicing.
counter and clear the overflow flag to 0 in the overflow interrupt
servicing.
Read the overflow counter.
When the overflow counter is “N”, the pulse width can be calculated
by (N × 10000H + D
In this example, the pulse width is (20000H + D
overflow occurs twice.
Clear the overflow counter (0H).
0H
D
m0
<1> <2>
m1
– D
1 cycle of 16-bit counter
m0
).
16-bit Timer/Event Counter P (TMP)
Pulse width
D
1H
m0
<3> <4>
D
m1
m1
2H 0H
– D
D
m0
m1
) because an