upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 245

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Flash Memory
Figure 6-12
Table 6-5
TXDA0 (output)
RESET (input)
FLMD1 (input)
FLMD0 (input)
RXDA0 (input)
Note
Note
(3)
V
DD
Flash memory programming mode start-up
The number of clocks to be inserted differs depending on the chosen
communication mode. For details, refer to Table 6-5.
Selecting communication mode
The communication mode is selected by applying a specified number of pulses
to the MODE pin after the flash memory programming mode is set. These
MODE pulses are generated by the flash programmer.
The relationship between the number of pulses and the communication mode
is shown in the table below.
Communication modes
When UARTA0 is selected, the receive clock is calculated based on the reset
command that is sent from the flash programmer after reception of the MODE
pulses.
Preliminary User’s Manual U17566EE1V2UM00
MODE
pulses
0
8
11
Others
V
0 V
V
0 V
V
0 V
V
0 V
V
0 V
V
0 V
DD
DD
DD
DD
DD
DD
supply
Power
ON
Communication
mode
UARTA0
CSIB0
CSIB0 + HS
-
release
Reset
stabilization
Oscillation
Communication
mode selection
(Note)
Remark
Communication rate: 9,600 bps (after reset),
LSB first
microcontroller operates as slave, MSB first
microcontroller operates as slave, MSB first
Setting prohibited
Flash control command communication
(such as erase and write)
Chapter 6
245