upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 536
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 16
536
Example
Caution
16.6.3 Baud rate calculation
16.6.4 Baud rate error
The baud rate is obtained by the following equation.
f
k =
The baud rate error is obtained by the following equation.
1.
2.
Base clock frequency = 8MHz
Setting value of
- UAnDTL1.UAnCKS[2:0] = 001B (PCLK2 = 4MHz)
- UAnCTL2.UAnBRS[7:0] = 0000 1101B (k = 13)
Target baud rate = 153,600 bps
Preliminary User’s Manual U17566EE1V2UM00
UCLK
The baud rate error during transmission must be within the error tolerance
on the receiving side.
The baud rate error during reception must satisfy the range indicated in (7)
Allowable baud rate range during reception.
Baud rate = 4MHz/ (2 × 13) = 153,846 [bps]
Error
Baud rate
Error (%)
= Frequency of base clock selected by the UAnCTL1.UAnCKS[2:0]
Value set using the UAnCTL2.UAnBRS[7:0] bits
(k = 4, 5, 6, …, 255)
=
=
= (153,846/153,600 – 1) × 100
= 0.160 [%]
(
f
-------------- - [bps]
2
Actual baud rate (baud rate with error)
--------------------------------------------------------------------------- -
UCLK
Target baud rate (correct baud rate)
×
k
Asynchronous Serial Interface (UARTA)
–
1
)
×
100 [%]
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