upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 235

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
Flash Memory
Peripherals and
pin functions
Initial Value
Initial Value
Address
Address
Caution
Access
Access
(1)
(2)
SELFEN - Self-programming enable control register
The 8-bit SELFEN register enables the self-programming functions by
software. It is an internal substitute to enabling self-programming by rising the
FLMD0 pin to high level.
This registers can be read/written in 8-bit or 1-bit units.
Writing to this register is protected by a special sequence of instructions.
Please refer to “SELFENP - Self-programming enable protection register“ on
page 235 for details.
FFFF FCA0
00
SELFENP - Self-programming enable protection register
The 8-bit SELFENP register protects the register SELFEN from inadvertent
write access, so that the system does not stop in case of a program hang-up.
After data has been written to the SELFENP register, the first write access to
register SELFEN is valid. All subsequent write accesses are ignored. Thus, the
value of SELFEN can only be rewritten in a specified sequence, and illegal
write access is inhibited.
This registers can be written in 8-bit units.
FFFF FCA8
The contents of this register is undefined.
In case a high level programming language is used, make sure that the
compiler translates the two write instructions to SELFENP and SELFEN into
two consecutive assembler “store” instructions.
All peripheral functions of the microcontroller continue operation during the
self-programming process. Further the functions of all pins do not change.
Preliminary User’s Manual U17566EE1V2UM00
Bit position
H
. This register is cleared by any reset.
W
R
X
7
0
7
0
H
H
W
R
6
0
6
X
Bit name
FLEN
W
R
X
5
0
5
Function
Enable self-programming
0: Flash write/erase function is controlled by the
1: Flash write/erase function is enabled
W
R
X
4
0
4
FLMD0 pin
W
R
X
3
0
3
W
R
2
0
2
X
W
R
X
1
0
1
Chapter 6
FLEN
R/W
W
X
0
0
235

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