upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 640

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
Chapter 19
640
19.1 Features
• Compliant with ISO 11898 and tested according to ISO/DIS 16845 (CAN
• Standard frame and extended frame transmission/reception enabled
• Transfer rate: 1 Mbps max. (if CAN clock input ≥ 8 MHz)
• 32 message buffers per channel
• Receive/transmit history list function
• Automatic block transmission function
• Multi-buffer receive block function
• Mask setting of four patterns is possible for each channel
• Wake-Up capability on CAN receive data pins CRXDn
• Data bit time, communication baud rate and sample point can be controlled
• Enhanced features:
Preliminary User’s Manual U17566EE1V2UM00
conformance test)
by CAN module bit-rate prescaler register (CnBRP) and bit rate register
(CnBTR)
– As an example the following sample-point configurations can be
– 66.7%, 70.0%, 75.0%, 80.0%, 81.3%, 85.0%, 87.5%
– Baudrates in the range of 10 kbps up to 1000 kbps can be configured
– Each message buffer can be configured to operate as a transmit or a
– Transmission priority is controlled by the identifier or by mailbox number
– A transmission request can be aborted by clearing the dedicated
– Automatic block transmission operation mode (ABT)
– Time stamp function for CAN channels 0 and 1 in collaboration with timer
configured:
receive message buffer
(selectable)
Transmit-Request flag of the concerned message buffer.
Timer G0 and Timer G1 capture channels
CAN Controller (CAN)

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