upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 921
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Preliminary User’s Manual U17566EE1V2UM00
Revision History
This revision list shows all functional changes of this document
U17566EE1V2UM00 compared to the 2nd edition of previous manual version
1.0 U17566EE1V1UM00 (date published 16/05/06).
Description
3 Timer G specified for all devices
ordering information added
section concerning external memory interface of µPD70F3427 added
TOP01 to TOP31 Timer P outputs also available on ports P34 to P37
size and address of VSB RAM corrected
section concerning instruction/data access times to various memories added
Ring oscillator clock corrected to 240 KHz
caution added concerning usage of devices used for debugging in mass production
maximum UART transfer rate for flash programming corrected to 153.600 bps
maximum CSI transfer rate for flash programming corrected to 2.5 MHz
PG-FP4 pin functions of FLMD0/FLMD1 corrected
"NPB access timing" section added
caution added to CSCn settings for µPD70F3426
caution added to BEC settings for µPD70F3426
local bus size configuration register LBS added for µPD70F3427
TPnCTL1 setting for external event count mode corrected: TPnCTL1.TPnEEE = 1
UART baud rate settings for 300 bps to 31250 bps corrected
operating precaution concerning CAN wake-up from sleep mode added
Specification of ADA0M2 settings extended: ADA0M2.ADA0TDM[1:0] = 00: no
trigger
correction: ADA0PFM.ADA0PFC = 1 for ADCR0H0 < ADA0PFT comparison
LCD-C/D register and bit names changed (LCDC to LCDC0, LCDM to LCDM0,
SEGREGk to SEGREG0k)
LCDM.VAON bit deleted
LCD driver edge enhancement section deleted
number of software breakpoints during on-chip debugging specified
921
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