upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 282

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 7
282
Figure 7-8
Figure 7-9
7.5.1 Endian format
7.5.2 Wait function
7.5 Configuration of Memory Access
(1)
The microcontroller device supports interfacing with various memory devices.
Therefore, the endian format, wait functions and idle state insertions can be
configured.
The endian format is specified with the endian configuration register (BEC). It
defines the byte order in which word data is stored.
"Big endian" means that the high-order byte of the word is stored in memory at
the lowest address, and the low-order byte at the highest address. Therefore,
the base address of the word addresses the high-order byte:
Big endian addresses within a word
"Little Endian" means that the low-order byte of the word is stored in memory
at the lowest address, and the high-order byte at the highest address.
Therefore, the base address of the word addresses the low-order byte:
Little endian addresses within a word
Several wait functions are supported:
Address setup wait
The microcontroller device allows insertion of address setup wait states before
the first access cycle (T1 state). The number of address setup wait states can
be set with the address setup wait control register ASC for each CS area.
Address setup wait states can be inserted when accessing SRAM or page
ROM.
Preliminary User’s Manual U17566EE1V2UM00
byte position
byte position
bit number
bit number
addresses
addresses
access via
access via
31
31
<base> + 3
<base> + 3
Byte 0
Byte 3
24 23
24 23
<base> + 2
<base> + 2
Byte 1
Byte 2
Bus and Memory Control (BCU, MEMC)
16 15
16 15
<base> + 1
<base> + 1
Byte 2
Byte 1
8
8
7
7
<base>
<base>
Byte 3
Byte 0
0
0