upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 616
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
- Current page: 616 of 930
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Chapter 18
616
<1> Not extension code (Example: Address mismatch)
<2> Extension code
ST
ST
▲1: IICSn register = 1000X110B
▲2: IICSn register = 01000110B (Example: When ALDn bit is read during interrupt servicing)
Δ 3: IICSn register = 00000001B
▲1: IICSn register = 1000X110B
▲2: IICSn register = 0110X010B (Example: When ALDn bit is read during interrupt servicing)
IICCn.LRELn bit is set to 1 by software
Δ 3: IICSn register = 00000001B
Remarks 1. ▲: Always generated
Remarks 1. ▲: Always generated
AD6 to AD0
AD6 to AD0
(4)
(5)
2. Dn = D6 to D0
2. Dn = D6 to D0
Δ: Generated only when SPIEn bit = 1
X: don’t care
n = 0 to 2
Δ: Generated only when SPIEn bit = 1
X: don’t care
n = 0 to 2
When arbitration loss occurs due to restart condition during data
transfer
When arbitration loss occurs due to stop condition during data transfer
Preliminary User’s Manual U17566EE1V2UM00
RW
RW
ST
▲1: IICSn register = 1000X110B
Δ 2: IICSn register = 01000001B
Remarks 1. ▲: Always generated
AK
AK
AD6 to AD0
▲1
▲1
D7 to Dn
D7 to Dn
2. Dn = D6 to D0
Δ: Generated only when SPIEn bit = 1
X: don’t care
n = 0 to 2
RW
ST
ST
AK
▲1
AD6 to AD0
AD6 to AD0
D7 to Dn
RW
RW
SP
Δ2
AK
AK
▲2
▲2
D7 to D0
D7 to D0
I
2
AK
AK
C Bus (IIC)
SP
SP
Δ3
Δ3
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