upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 865

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Reset
Internal reference
Supply voltage
voltage (V
SYSRESWDT
Figure 26-2
SYSRES
(V
IP
26.1.2 Reset at power-on
)
DD
Reset period
)
Note
Note
In the table above, “Undefined” means either undefined at the time of a
power-on reset, or undefined due to data destruction when the falling edge of
the external RESET signal corrupts an ongoing RAM write access.
The internal RAM of the microcontroller comprises several separate RAM
blocks. In case writing to one RAM block while a reset occurs the contents of
only this RAM block may be corrupted. The other RAM blocks remain
unchanged.
The Power-On-Clear circuit (POC) permanently compares the power supply
voltage V
microcontroller only operates as long as the power supply exceeds a well-
defined limit.
When the power supply voltage falls below the internal reference voltage
(V
After Power-On-Clear reset, the RESSTAT register is cleared and the
RESSTAT.RESPOC bit is set (RESSTAT = 01
source flag register“ on page 868 for the interaction between Power-On-Clear
and external RESET). The system reset signals SYSRES and SYSRESWDT
are generated.
1.
2.
The following figure shows the timing when a reset is performed at power-on.
The Power-On-Clear function holds the microcontroller in reset state as long
as the power supply voltage does not exceed the threshold level V
Timing of internal reset signal generation by Power-On-Clear circuit
Preliminary User’s Manual U17566EE1V2UM00
Delay
DD
Depending on the supply voltage drop rate it may be required to apply an
external RESET signal additionally in order to avoid microcontroller
operation out of the specified operating conditions. For detailed electrical
characteristics refer to the Electrical Target Specification.
POC shares the reference voltage supply with the power regulators.
< V
IP
DD
), the internal reset signal RESPOC is generated.
with an internal reference voltage (V
Reset period
H
, refer also to “RESSTAT - Reset
IP
). It ensures that the
Reset period
IP
Chapter 26
.
Time
865