upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 349

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

16-bit Timer/Event Counter P (TMP)
Bit position
3
2
1
0
Initial Value
Table 11-5
Address
Caution
Access
Bit name
TPnOE1
TPnOE0
TPnOL1
TPnOL0
(3)
3.
4.
TPnIOC0 - TMPn I/O control register 0
The TPnIOC0 register is an 8-bit register that controls the timer output
(TOPn0, TOPn1 pins).
This register can be read/written in 8-bit or 1-bit units.
<base> + 2
00
TPnIOC0 register contents
1.
2.
Preliminary User’s Manual U17566EE1V2UM00
H
Set the TPnEEE and TPnMD2 to TPnMD0 bits when the TPnCTL0.TPnCE
bit = 0. (The same value can be written when the TPnCE bit = 1.) The
operation is not guaranteed when rewriting is performed with the TPnCE
bit = 1. If rewriting was mistakenly performed, clear the TPnCE bit to 0 and
then set the bits again.
Be sure to clear bits 3, 4, and 7 to 0.
Rewrite the TPnOL1, TPnOE1, TPnOL0, and TPnOE0 bits when the
TPnCTL0.TPnCE bit = 0. (The same value can be written when the TPnCE
bit = 1.) If rewriting was mistakenly performed, clear the TPnCE bit to 0 and
then set the bits again.
Even if the TPnOLm bit is manipulated when the TPnCE and TPnOEm bits
are 0, the TOPnm pin output level varies (m = 0, 1).
R/W
. This register is initialized by any reset.
7
0
Function
TOPn1 pin output level setting:
TOPn1 pin output setting:
TOPn0 pin output level setting:
TOPn0 pin output setting:
0: TOPn1 pin output inversion disabled
1: TOPn1 pin output inversion enabled
0: Timer output disable
1: Timer output enable
0: TOPn0 pin output inversion disabled
1: TOPn0 pin output inversion enabled
0: Timer output disable
1: Timer output enable
– when TPnOL1 = 0: low level is output from TOPn1 pin
– when TPnOL1 = 1: high level is output from TOPn1 pin
(A square wave is output from TOPn1 pin.)
– when TPnOL0 = 0: low level is output from TOPn0 pin
– when TPnOL0 = 1: high level is output from TOPn0 pin
(A square wave is output from TOPn0 pin.)
H
R/W
6
0
R/W
5
0
R/W
4
0
TPnOL1
R/W
3
TPnOE1
R/W
2
TPnOL0
R/W
1
Chapter 11
TPnOE0
R/W
0
349