upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 170

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 4
170
Table 4-25
(2)
IDLE mode
The IDLE mode can be entered from any run mode. The main oscillator must
be operating. IDLE mode can not be entered if the CPU is clocked by the sub
or ring oscillator.
In IDLE mode, the clock distribution is stopped (refer to the “Standby” switches
in Figure 4-1, “Block diagram of the Clock Generator,” on page 130).
The states of all clock sources, that means, sub and ring oscillator as well as
SSCG and PLL, remain unchanged. If a clock source was operating before
entering IDLE mode, it continues operating.
Clock Generator status in IDLE mode
The IDLE mode can be released by
• the unmasked maskable interrupts INTPn, INTCnWUP, INTWTnUV,
• NMI0, NMIWDT
• RESET, RESPOC, RESWDT, RESCMM, RESCMS
On IDLE mode release, the CPU clock and peripheral clocks are supplied by
the main oscillator.
Preliminary User’s Manual U17566EE1V2UM00
Item
Main oscillator
Sub oscillator
Ring oscillator
SSCG
PLL
VBCLK (CPU system)
IICLK
PCLK0, PCLK1
PCLK2…PCLK15
SPCLK0, SPCLK1
SPCLK2…SPCLK15
FOUTCLK
WTCLK / LCDCLK
WDTCLK
WCTCLK
INTTM01, INTVCn, INTCBnR
Status
unchanged
operates
operates
unchanged
unchanged
stopped
stopped
stopped
stopped
stopped
stopped
unchanged
unchanged
unchanged
unchanged/stopped
Remarks
Depends on clock selector
PSM.CMODE
Clock Generator