upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 781
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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A/D Converter (ADC)
A/D converter
ADCR0n
operation
INTAD
SAR
Figure 20-3
Undefined
20.4.1 Basic operation
20.4 Operation
Sampling
Sampling time
1. Set the operation mode, trigger mode, and conversion time for executing A/
2. When A/D conversion is started, the voltage input to the selected analog
3. When the sample & hold circuit samples the input channel for a specific
4. Set bit 9 of the successive approximation register (SAR). The tap selector
5. The voltage difference between the voltage of the series resistor string and
6. Next, bit 8 of the SAR register is automatically set and the next comparison
7. This comparison is continued to bit 0 of the SAR register.
8. When comparison of the 10 bits is complete, the valid digital result is
A/D Converter basic operation
Preliminary User’s Manual U17566EE1V2UM00
This voltage tap and the analog input voltage are compared and, depending
on the result, bit 8 is manipulated as follows.
Analog input voltage ≥ Voltage tap: Bit 8 = 1
Analog input voltage ≤ Voltage tap: Bit 8 = 0
D conversion by using the ADA0M0, ADA0M1, ADA0M2, and ADA0S
registers. When the ADA0CE bit of the ADA0M0 register is set, conversion
is started in the software trigger mode and the A/D Converter waits for a
trigger in the external or timer trigger mode.
input channel is sampled by the sample & hold circuit.
time, it enters the hold status, and holds the input analog voltage until A/D
conversion is complete.
selects (1/2) AV
the analog input voltage is compared by the voltage comparator. If the
analog input voltage is higher than (1/2) AV
remains set. If it is lower than (1/2) AV
is started. Depending on the value of bit 9, to which a result has been
already set, the voltage tap of the series resistor string is selected as
follows:
–Bit 9 = 1: (3/4) AV
–Bit 9 = 0: (1/4) AV
stored in the SAR register, which is then transferred to and stored in the
ADCR0n register. At the same time, an A/D conversion end interrupt
request signal (INTAD) is generated.
REF
as the voltage tap of the series resistor string.
REF
REF
Conversion time
A/D conversion
REF
, the MSB is reset.
REF
, the MSB of the SAR register
Chapter 20
Conversion
Conversion
result
result
781
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