upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 250
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 7
250
VFB
VDB
Figure 7-1
Busses
7.2 Description
Controller
CPU
DMA
• Page ROM controller
The figure below shows a block diagram of the modules that are necessary for
accessing on-chip peripherals, external memory, or external I/O.
Bus and Memory Control diagram
The busses are abbreviated as follows:
• NPB: NEC peripheral bus
Preliminary User’s Manual U17566EE1V2UM00
– Direct connection to 8-bit/16-bit/32-bit page ROM supported
– Page ROM controller handles page widths from 8 to 128 bytes
– On-page judgement function
– Masking addresses can be changed by register setting
– Register for controlling the programmable wait during page access
– Supported page access depends on data bus width:
Data bus width
32 bit
16 bit
8 bit
Control
(BCU)
Bus
Unit
On-chip Peripheral I/O
Internal Bus (NPB)
Bus Bridge
(BBR)
VSB
Supported page access
2/4/8/16/32 x 32 bits
4/8/16/32/64 x 16 bits
8/16/32/64/128 x 8 bits
Bus and Memory Control (BCU, MEMC)
µPD70F3427
only
µPD70F3426
only
µPD70F3426
only
VSB Flash
VSB RAM
Controller
(MEMC)
Memory
D[31:0]
A[23:0]
BCLK
WAIT
CS0
CS1
CS3
CS4
BE0
BE1
BE2
BE3
WR
RD
External
Device
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