upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 276
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 7
276
Initial Value
Table 7-23
Address
Caution
Access
(6)
RDDLY - Read delay control register
The 8-bit RDDLY register controls the delay of the read strobe RD of the
external memory interface. It provides the option to delay the rising edge of the
RD by a half of the bus clock cycle BCLK.
This register can be read/written in 8- and 1-bit units.
FFFF FF00
00
RDDLY register contents
To initialize an external memory area after a reset, this register has to be set.
Do not access external devices before initialization is finished. Do not change
this register while an external device is accessed.
Preliminary User’s Manual U17566EE1V2UM00
position
H
Bit
R
7
0
0
H
RDDLYEN
Bit name
R
6
0
R
Function
Read strobe control.
5
0
0: Rising RD edge not delayed
1: Rising RD edge delayed by half BCLK clock cycle
R
4
0
Bus and Memory Control (BCU, MEMC)
R
3
0
R
2
0
R
1
0
RDDLYEN
R/W
0
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