upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 275

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Bus and Memory Control (BCU, MEMC)
BC71 BC70 BC61 BC60 BC51 BC50 BC41 BC40 BC31 BC30 BC21 BC20 BC11 BC10 BC01 BC00
Bit position
15
15 to 0
CS7
14
Initial Value
Table 7-22
Address
Caution
Access
13
Note
CS6
Bit name
BCk[1:0]
(5)
12
BCC - Bus cycle control register
The 16-bit BCC register controls the number of idle states inserted after the T2
cycle. Each chip select area is controlled separately. A maximum of three idle
states is possible.
Idle states can be inserted when accessing SRAM , external I/O, external
ROM, or page ROM.
This register can be read/written in 16-bit units.
FFFF F488
FFFF
BCC register contents
For access to internal memory, no idle states are inserted.
To initialize an external memory area after a reset, this register has to be set.
Do not access external devices before initialization is finished. Do not change
this register while an external device is accessed.
Preliminary User’s Manual U17566EE1V2UM00
11
CS5
H
. After system reset, three idle states are inserted.
Function
Sets the number of idle states for each chip select area.
10
H
BCk[1:0]
9
00
01
10
11
CS4
B
B
B
B
8
7
Inserted idle states
No idle state inserted
1 idle state
2 idle states
3 idle states
CS3
6
5
CS2
4
3
CS1
2
Chapter 7
1
CS0
0
275