upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 852

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 24
852
PWM frequency
Duty cycle
Table 24-4
Example
(2)
PWM calculations
The PWM frequency is generated by the counter SG0FL. It can be calculated
as:
where:
f
[SG0FL buffer] = contents of the SG0FL buffer
The duty cycle of the PWM signal is calculated as follows:
• If [SG0PWM buffer] > [SG0FL buffer]:
• If 0 ≤ [SG0PWM buffer] ≤ [SG0FL buffer]:
where:
[SG0PWM buffer] = contents of SG0PWM buffer
[SG0FL buffer] = contents of SG0FL buffer
If [SG0FL] is set to 240 (00F0
Duty cycle calculation example
The table shows, how the contents of register SG0FL affects the achievable
volume resolution.
Preliminary User’s Manual U17566EE1V2UM00
SG0CLK
f
Duty cycle = 100 %
Duty cycle = [SG0PWM buffer] / ([SG0FL buffer] + 1)
PWM
[SG0PWM]
= frequency of the SG0 input clock
= f
01FF
00EF
00F1
00F0
0001
0000
...
...
SG0CLK
H
H
H
H
H
H
/ (([SG0FL buffer] + 1)
H
), the following table applies:
Calculation
241 / 241
240 / 241
239 / 241
1 / 241
0 / 241
...
Sound Generator (SG)
Duty cycle [%]
99.6
99.2
0.41
100
100
100
...
0