upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 816

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 22
816
Figure 22-3
Figure 22-4
(Divided by 4)
COM0
22.3.1 Common signals and segment signals
22.3 Operation
(1)
The following describes the timing of common and segment signals, the
activation of an LCD segment and how edge enhancement can be applied.
This section describes the timing of common signals and segment signals and
at which conditions an individual LCD segment becomes visible.
Common Signals
Common signals COM0 to COM3 are generated internally. Together with the
segment signals, they define which LCD segment is activated in the current
cycle.
Figure 22-3 shows the common signal wave form for COM0, 1/4 duty (1/3
bias). 1/4 duty means each signal COMn is in selection level for one quarter of
a frame.
Common signal wave form (1/4 duty, 1/3 bias)
• T
• T = duty cycle time.
Each LCD segment is allocated to one of the common signals. The LCD
segment can only be activated in a duty cycle, in which the common signal is
at selection level.
Figure 22-4 shows the selection and non-selection level of common signals.
Selection level and non-selection level of common signals
T = duty cycle time.
Preliminary User’s Manual U17566EE1V2UM00
T
T corresponds to the duty cycle frequency f
register LCDC.
Each frame cycle T
for each signal COMn.
F
F
T
= frame cycle time.
= 4 x T
F
= 4 x T
Common signal
F
is comprised of 4 duty cycles (1/4 duty), one duty cycle
Selected
T
Not selected
LCD Controller/Driver (LCD-C/D)
T
LCD1
and is thus determined by
V
V
V
V
LC0
LC1
LC2
SS1
V
LCD
V
V
V
V
LC0
LC1
LC2
SS1
V
LCD