upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 312

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

DSAH0
DSAH1
DSAH2
DSAH3
Chapter 8
312
Bit position
11 to 0
15
15
IR
15
15
15
IR
IR
IR
14
14
14
14
0
0
0
0
Caution
Bit name
8.3.1 DMA Source address registers
13
13
13
13
0
0
0
0
SA27 to
SA16
8.3 DMAC Registers
(1)
IR
12
12
12
12
0
0
0
0
These registers are used to set the DMA source addresses (28 bits each) for
DMA channel n. They are divided into two 16-bit registers, DSAHn and DSALn.
Since these registers are configured as 2-stage FIFO buffer registers, a new
source address for DMA transfer can be specified during DMA transfer (refer to
“Automatic Restart Function” on page 323).
DMA transfers of misaligned 16-bit/32-bit data is not supported.
DSAHn - DMA source address registers Hn
These registers can be read/written in 16-bit units.
Preliminary User’s Manual U17566EE1V2UM00
SA26 SA26 SA25 SA24 SA23 SA22 SA21 SA20 SA19 SA18 SA17 SA16 FFFFF082H
SA26
SA26
SA26
11
11
11
11
Function
Specifies the DMA source address.
Sets the DMA source addresses (A27 to A16).
During DMA transfer, it stores the next DMA transfer source address.
0: External memory or On-chip peripheral I/O
1: Internal RAM
SA26
SA26
SA26
10
10
10
10
SA25
SA25
SA25
9
9
9
9
SA24
SA24
SA24
8
8
8
8
SA23
SA23
SA23
7
7
7
7
SA22
SA22
SA22
6
6
6
6
SA21
SA21
SA21
5
5
5
5
SA20
SA20
SA20
4
4
4
4
SA19
SA19
SA19
3
3
3
3
SA18
SA18
SA18
2
2
2
2
DMA Controller (DMAC)
SA17
SA17
SA17
1
1
1
1
SA16
SA16
SA16
0
0
0
0
Address
FFFFF08AH
FFFFF092H
FFFFF09AH
Address
Address
Address
undef.
undef.
undef.
undef.
value
value
value
value
Initial
Initial
Initial
Initial