upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 503

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Watchdog Timer (WDT)
WDCS2
0
0
0
0
1
1
1
1
Table 15-4
WDCS1
Note
Note
0
0
1
1
0
0
1
1
The running time depends on the frequency of the chosen clock. The following
table shows two examples for 4 MHz and 32 KHz.
Running time examples
These are just two examples for WDTCLK. The actual clock signal depends on
the clock divider settings and the external oscillator resonators.
Every reset sets the WDCS register to 07
interval.
After SYSRESWDT, the timer is always stopped and initialized. You can write a
smaller value to the register.
After SYSRES, the WDTM register is not cleared. If the Watchdog Timer was
running before SYSRES occurred, it remains active. To specify a shorter
interval:
1. Write one byte to the WCMD register (the value is ignored)
2. Immediately after that, write one byte with the desired value of WDCS[2:0]
The write operation resets the watchdog counter to zero, and it continues with
the new timing.
When the timer is active, WDCS can only be written once after reset. Then, the
register is locked until the next reset occurs (WDTM.LOCK_CS = 1).
Preliminary User’s Manual U17566EE1V2UM00
WDCS0
to the WDCS register
0
1
0
1
0
1
0
1
2
2
2
2
2
2
2
2
Calculation
13
14
15
16
17
18
19
20
/ f
/ f
/ f
/ f
/ f
/ f
/ f
/ f
WDTCLK
WDTCLK
WDTCLK
WDTCLK
WDTCLK
WDTCLK
WDTCLK
WDTCLK
f
WDTCLK
oscillator)
16.4 ms
32.8 ms
65.5 ms
131 ms
262 ms
4.1 ms
8.2 ms
= 4 MHz (main
2 ms
H
, which means the longest time
Time until overflow
f
WDTCLK
oscillator)
256 ms
512 ms
16.38 s
32.77 s
1.02 s
2.05 s
4.10 s
8.20 s
= 32 KHz (sub
Chapter 15
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