TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 98

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

TFFCR
(0025H)
Bit symbol
Read/Write
After reset
Function
TFFCR<TFF3C1:0>, <TFF1C1:0> are read as 1.
00: Invert TFF3
01: Set TFF3
10: Clear TFF3
11: Don’t care
TFF3C1
7
1
(“Don’t care” except in 8-bit timer mode)
Select inverse signal of timer F/F3 (TFF3)
Inversion of timer flip-flop 3 (TFF3)
Control of timer flip-flop 3 (TFF3)
00
01
10
11
0
1
0
1
W
Figure 3.7.8 Registers for 8-Bit Timers (4/5)
TFF3C0
Inversion by timer 2
Inversion by timer 3
Disable inversion
Enable inversion
Invert the value of TFF3
(Software inversion)
Set TFF3 to 1.
Clear TFF3 to 0.
Don’t care (Always read as 11)
6
1
Timer Flip-flop Control Register
TFF3
Inversion
trigger
0: Disable
1: Enable
TFF3IE
5
0
93CS20-96
R/W
TFF3
Inversion
source
0: Timer 2
1: Timer 3
TFF3IS
4
0
00: Invert TFF1
01: Set TFF1
10: Clear TFF1
11: Don’t care
TFF1C1
3
1
W
(“Don’t care” except in 8-bit timer mode)
Select inverse signal of timer F/F1 (TFF1)
Inversion of timer flip-flop 1 (TFF1)
Control of timer flip-flop 1 (TFF1)
TFF1C0
00
01
10
11
0
1
0
1
2
1
Inversion by timer 0
Inversion by timer 1
Disable inversion
Enable inversion
Invert the value of TFF1
(Software inversion)
Set TFF1 to 1.
Clear TFF1 to 0.
Don’t care (Always read as 11)
TFF1
Inversion
trigger
0: Disable
1: Enable
TFF1IE
1
0
R/W
TFF1
Inversion
source
0: Timer 0
1: Timer 1
TFF1IS
TMP93CS20
0
0
2004-02-10