TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 173

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

SBICR1
(004BH)
Prohibit
read-
modify-
write
3.10.4
Note 1: Set <BC2:0> to 000 before switching to a clock-synchronous 8-bit SIO mode.
Note 2: Refer to the sentence of 3.10.4 (3) “Serial clock”.
Note 3: This I
Bit symbol
Read/Write
After reset
Function
I
the serial bus interface (SBI) in the I
2
C Bus Mode Control
The following registers are used for control and operation status monitoring when using
Number of transferred bits
(Note 1)
2
C bus circuit does not support high-speed mode. It supports standard mode only.
BC2
7
0
Figure 3.10.3 Register for I
Serial Bus Interface Control Register 1
BC1
W
6
0
BC0
93CS20-171
5
0
2
C bus mode.
Acknowl
edge
mode
specifica-
tion
Number of transferred bits
ACK
R/W
<BC2:0>
4
0
2
C Bus Mode (1/4)
000
001
010
011
100
101
110
111
Acknowledge mode specification
Serial clock selection
000
001
010
011
100
101
110
111
0
1
Number of
N = 4
N = 5
N = 6
N = 7
N = 8
N = 9
N = 10
Not generate clock pulse for acknowledge signal
Generate clock pulse for acknowledge signal
3
Clock
8
1
2
3
4
5
6
7
<ACK> = 0
(Reserved)
Serial clock selection
(Note 2)
74.6 kHz
38.2 kHz
19.3 kHz
SCK2
−
−
9.71 kHz
−
2
0
Bits
8
1
2
3
4
5
6
7
kHz
kHz
kHz
SCK1
Number of
W
System clock: fc
Clock gear: fc/1
fc = 20 MHz
(Output on SCL pin)
1
0
Clock
9
2
3
4
5
6
7
8
<ACK> = 1
TMP93CS20
2004-02-10
SCK0
0
0
Bits
8
1
2
3
4
5
6
7