TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 213

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

Read-
modify-
write is
prohibited
LCDCR
(0094H)
3.14.2
Bit symbol
Read/Write
After reset
Function
LCD Driver Control
circuit control register (CHPCR). The LCD driver display is enabled by the
CHPCR<EDSP>.
The LCD driver is controlled by a LCD control register (LCDCR) and a LCD boosting
7
Figure 3.14.2 LCD Driver Control Registers
Boosting frequency
00: fc/2
01: fc/2
10: fc/2
11: fc/2
SLFR1
6
0
14
12
11
10
or fs/2
or fs/2
or fs/2
or fs/2
LCD Control Register
SLFR0
5
3
2
93CS20-211
5
0
Reference
clock
0: fc
1: fs
SBF
4
0
LCD drive
00: 1/4 duty
01: 1/3 duty
10: 1/2 duty
11: Static
DUTY1
Selection of base frequency
Setting of LCD drive
Selection of boosting frequency
Selection of reference clock frequency
for base and boosting frequencies
W
00
01
10
11
00
01
10
11
00
01
00
01
10
11
3
0
fc/2
fc/2
fc/2
fc/2
1/4 duty (1/3 bias)
1/3 duty (1/3 bias)
1/2 duty (1/3 bias)
Static
fc
fs
fc/2
fc/2
fc/2
fc/2
18
17
16
15
14
12
11
10
DUTY0
or fs/2
or fs/2
or fs/2
or fs/2
or fs/2
or fs/2
or fs/2
or fs/2
2
0
9
8
7
6
5
3
2
Base frequency
00: fc/2
01: fc/2
10: fc/2
11: fc/2
SLF1
1
0
18
17
16
15
or fs/2
or fs/2
or fs/2
or fs/2
TMP93CS20
2004-02-10
SLF0
9
8
7
6
0
0