TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 55

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
3.5.1
Port 0 (P00 to P07)
register P0CR. Resetting resets all bits of P0CR to 0 and sets port 0 to input mode.
address data bus (AD0 to AD7). To access external memory, port 0 functions as an address
data bus (AD0 to AD7), and all bits of the control register P0CR are cleared to 0.
Port 0 is an 8-bit general-purpose I/O port. I/O can be set on a bit basis using the control
In addition to functioning as a general-purpose I/O port, port 0 also functions as an
Direction control
P0 read
(on bit basis)
Output latch
P0CR write
P0 write
Reset
Figure 3.5.1 Port 0
93CS20-53
Selector
S
B
A
Output buffter
A
B
Port 0
P00 to P07
(AD0 to AD7)
Selector
S
TMP93CS20
2004-02-10

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