TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 199

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
ADREG26L
(0064H)
ADREG26H
(0065H)
ADREG37L
(0066H)
ADREG37H
(0067H)
Channel x conversion result
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
AD conversion result.
AD conversion result.
Stores lower 2 bits of
Stores lower 2 bits of
ADR21
ADR29
ADR31
ADR39
7
7
7
7
Undefined
Undefined
ADREGxH
Figure 3.11.5 Registers for AD Converter (4/4)
9
R
R
7
AD Conversion Result Register 2/6 High
AD Conversion Result Register 3/7 High
AD Conversion Result Register 2/6 Low
AD Conversion Result Register 3/7 Low
ADR20
ADR28
ADR30
ADR38
8
6
6
6
6
6
7
5
ADR27
ADR37
Stores upper 8 bits of AD conversion result.
Stores upper 8 bits of AD conversion result.
6
4
93CS20-197
5
5
5
5
3
5
• Bits 5 to 1 are always read as 1.
• Bit0 is conversion result stored flag bit <ADRxRF>.
<ADRxRF> is set to 1 when the AD conversion result is stored.
Reading either the ADREGxH or the ADREGxL registers clears
<ADRxRF> to 0.
ADR26
ADR36
2
4
4
4
4
4
Undefined
Undefined
1
3
R
R
0
ADR25
ADR35
2
3
3
3
3
1
7
ADR24
ADR34
6
0
2
2
2
2
5
ADR23
ADR33
4
1
1
1
1
3
Conversion
result
stored flag
1: Exist
Conversion
result
stored flag
1: Exist
TMP93CS20
2
ADR2RF
ADR3RF
ADR22
ADR32
2004-02-10
result
result
ADREGxL
R
R
0
0
0
0
0
0
1
0

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