TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 108

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

<SYSCK>
XXX: Don’t care
System
Select
Clock
1 (fs)
0 (fc)
XXX
XXX
16-bit timer mode
8-bit timer × 2 channels
8-bit PPG × 1 channel
8-bit PWM × 1 channel
8-bit timer × 1 channel
−: Don’t care
Register Name
Bit Name
Prescaler Clock
Function
(Low-frequency
<PRCK1:0>
(fc/16 clock)
Select
(5) Timer mode setting registers
clock)
(f
FPH
00
01
10
)
Table 3.7.3 shows the list of 8-bit timer modes.
<GEAR2:0>
Gear Value
XXX
000 (fc)
001 (fc/2)
010 (fc/4)
011 (fc/8)
100 (fc/16)
XXX
XXX
Timer Mode
T10M/T32M
Table 3.7.3 Timer Mode Setting Registers
01
00
10
11
11
100.8 µs 403.2 µs
201.6 µs 806.4 µs
403.2 µs
403.2 µs
15.4 ms 61.5 ms 246
25.2 µs 100.8 µs 403.2 µs
50.4 µs 201.6 µs 806.4 µs 101.6 µs 406.4 µs
15.4 ms 61.5 ms 246
φT1
Table 3.7.2 PWM Cycle
2
6
PWM Cycle
− 1, 2
(01, 10, 11)
2
93CS20-106
PWM2
1.61 ms
1.61 ms
φT4
6
7
− 1
－
T10MOD/T32MOD
−
−
−
− 1, 2
8
φT16
1.61 ms 203.2 µs 812.8 µs
3.23 ms 406.4 µs
6.45 ms 812.8 µs
6.45 ms 812.8 µs
− 1
ms
ms
φT1, φT16 , φT256
φT1, φT16, φT256
T1CLK/T3CLK
(00, 01, 10, 11)
Upper Timer
Input Clock
Lower timer
(01, 10, 11)
31.0 ms 124
50.8 µs 203.2 µs 812.8 µs 102.0 µs 408.0 µs
31.0 ms 124
φT1
match:
−
−
−
PWM Cycle
2
1.63 ms
3.25 ms
3.25 ms
φT4
7
− 1
ms 496
ms 496
T0CLK/T2CLK
φT1, φT4, φT16
φT1, φT4, φT16
(00, 01, 10, 11)
φT1, φT4, φT16
(00, 01, 10, 11)
φT1, φT4, φT16
(00, 01, 10, 11)
External clock,
External clock,
External clock,
External clock,
(00, 01, 10, 11)
Lower Timer
Input Clock
13.04 ms
13.04 ms
φT16
1.63 ms 204.0 µs 816.0 µs
3.26 ms 408.0 µs
6.52 ms 816.0 µs
−
ms
ms
at fc = 20 MHz, fs = 32.768 kHz
62.3 ms 249
62.3 ms 249
1.63 ms
1.63 ms
φT1
Timer F/F Invert
TFF1IS/TFF3IS
0: Lower timer
1: Upper timer
Output disabled
Signal Select
output
output
TMP93CS20
2
1.63 ms
3.26 ms
6.53 ms
6.53 ms
TFFCR
φT4
8
2004-02-10
− 1
−
−
−
ms 996
ms 996
13.06 ms
26.11 ms
26.11 ms
φT16
1.63 ms
3.26 ms
6.53 ms
ms
ms